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The PL102-10 is a high performance, low skew, low jitter zero delay buffer designed to distribute high speed

clocks and is available in 8-pin SOP or 6-pin SOT23 package. It has two outputs that are synchronized with the

input. The synchronization is established via CLKOUT feed back to the input of the PLL. Since the skew between

the input and output is less than ?350 ps, the device acts as a zero delay buffer.

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